Q:

When is a system in safe state?

Answer

The set of dispatchable processes is in a safe state if there exists at least one temporal order in which all processes can be run to completion without resulting in a deadlock.

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Subject: Operating Systems

7 8123

Q:

HTML is a subset of

A) SGMH	B) SGMD
C) SGML	D) None of the above

Answer & Explanation Answer: C) SGML

Explanation:

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Filed Under: Computer
Exam Prep: Bank Exams

3 8123

Q:

Which of the following electromagnetic waves has minimum wavelength?

A) Alpha	B) Gamma
C) Infrared	D) X-rays

Answer & Explanation Answer: B) Gamma

Explanation:

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Filed Under: Physics
Exam Prep: Bank Exams

2 8117

Q:

Which Country has opened its fifth Nuclear Power Plant to meet its growing energy demands ?

A) India	B) Pakistan
C) Russia	D) China

Answer & Explanation Answer: B) Pakistan

Explanation:

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Filed Under: General Awareness
Exam Prep: AIEEE , Bank Exams , CAT
Job Role: Bank Clerk , Bank PO

55 8115

Q:

In nuclear reactor the speed of neutrons is slowed down by

A) heavy water	B) ordinary water
C) Zinc rods	D) molten caustic soda

Answer & Explanation Answer: A) heavy water

Explanation:

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Filed Under: Chemistry

12 8114

Q:

The age of a lion can be determined from its

A) hair	B) nose
C) nails	D) tail

Answer & Explanation Answer: B) nose

Explanation:

By seeing the color of the nose we can determine the age of lions.

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Filed Under: Animals and Birds
Exam Prep: AIEEE , Bank Exams , CAT
Job Role: Analyst , Bank Clerk , Bank PO

24 8109

Q:

Which of the statements given below are correct?

A) In 2017 Pro Kabaddi League, Sandeep Narwal played for Bengaluru Bulls.

B) In 2017, Dani Pedrosa raced in MotoGP for Honda.

C) In 2017, Glenn Maxwell captained the IPL team Kolkata Knight Riders.

A) Only B	B) Both A and B
C) Both A and C	D) A, B and C

Answer & Explanation Answer: B) Both A and B

Explanation:

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Filed Under: Sports
Exam Prep: Bank Exams

1 8108

Q:

What is cycle stealing?

Answer

We encounter cycle stealing in the context of Direct Memory Access (DMA). Either the DMA controller can use the data bus when the CPU does not need it, or it may force the CPU to temporarily suspend operation. The latter technique is called cycle stealing. Note that cycle stealing can be done only at specific break points in an instruction cycle.

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